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EOAM_ADP/3/FPGAFULL

Message

EOAM_ADP/3/FPGAFULL:FPGA table is Full. (mod:[ULONG], port:[ULONG], vlan:[ULONG])

Description

The number of logical entry resources reaches the upper limit.

Parameters

Parameter Name Parameter Meaning
mod Chip ID.
port Port number.
vlan VLAN ID.

Possible Causes

The number of ports added to the VLAN associated with the maintenance association (MA) defined in 802.1ag exceeds the upper limit.

Procedure

  1. Remove unnecessary ports from the VLAN associated with the MA.
  2. Contact technical support personnel.
Parent Topic: EOAM_ADP
Copyright © Huawei Technologies Co., Ltd.
Copyright © Huawei Technologies Co., Ltd.
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