CLKM_1.3.6.1.4.1.2011.5.25.186.1.8.11 hwClockSourceFailed

Trap Buffer Description

The state of clock source is abnormal. (hwClockSrcCfgChassisIndex=[hwClockSrcCfgChassisIndex], hwClockSrcCfgSourceTypeIndex=[hwClockSrcCfgSourceTypeIndex], hwClockSrcCfgSourceIndex=[hwClockSrcCfgSourceIndex], hwClockChassisId=[hwClockChassisId], hwClockCurSourceName=[hwClockCurSourceName], hwClockSrcCfgSourceState=[hwClockSrcCfgSourceState])

The clock source was in an incorrect state.

In VS mode, this trap is supported only by the admin VS.

Trap Attributes

Trap Attribute Description

Alarm or Event

Alarm

Trap Severity

Warning

Mnemonic Code

hwClockSourceFailed

Trap OID

1.3.6.1.4.1.2011.5.25.186.1.8.11

MIB

HUAWEI-CLOCK-MIB

Alarm ID

0x09af0006

Alarm Name

hwClockSourceFailed

Alarm Type

equipmentAlarm

Raise or Clear

Raise

Match trap

CLKM_1.3.6.1.4.1.2011.5.25.186.1.8.12 hwClockSourceValid

Trap Buffer Parameters

Parameter Description

hwClockSrcCfgChassisIndex

Indicates the index of the chassis where the non-PTP clock source is located. In the case of a single chassis, the index is 1. For a chassis where a PTP clock source is located, the index is invalid.

hwClockSrcCfgSourceTypeIndex

Index of the clock source type. values:

bits(1).

ptp(2).

interface(3).

cesacr(4).

hwClockSrcCfgSourceIndex

Index of the clock source.

hwClockChassisId

Chassis id.

hwClockCurSourceName

Name of the current clock source.

hwClockSrcCfgSourceState

The state of the current clock source. Value of clock source state:

initial(0), initial state.

normal(1), normal state.

abnormal(2), abnormal state.

wtr(3), wtr state.

holdoff(4), holdoff state.

VB Parameters

VB OID VB Name VB Index

1.3.6.1.4.1.2011.5.25.186.1.7.4

hwClockChassisId

-

1.3.6.1.4.1.2011.5.25.186.1.7.2

hwClockCurSourceName

-

1.3.6.1.4.1.2011.5.25.186.1.11.1.11

hwClockSrcCfgSourceState

hwClockSrcCfgChassisIndex

hwClockSrcCfgSourceTypeIndex

hwClockSrcCfgSourceIndex

Impact on the System

The NE cannot trace this clock source.

Possible Causes

Cause1: The clock source is abnormal.

Cause2: The clock signals have an excessive frequency deviation.

Cause3: Users forcibly disable the line port.

Cause4: An incorrect signal type is specified for the external clock source.

Procedure

1. View the name of the clock source to determine the type of the clock source.

  • If the clock source is a line clock source, go to step 2.
  • If the clock source is an external clock source, go to step 3.
  • If the clock source is a PTP clock source, go to step 9.

2. Check whether the link is properly connected and the indicator is on.

  • If so, go to step 4.
  • If not, go to step 10.

3. Run the display interface brief command to check whether the directly connected interfaces are shut down.

  • If so, go to step 4.
  • If not, go to step 10.

4. Run the undo shutdown command on the interface to start it.

5. Run the display clock config command to check whether the clock signal types of the external clock sources are the same. The clock signal type can be 2mbps or 2mhz.

  • If so, go to step 6.
  • If not, go to step 8.

6. Run the display clock source command on the peer end to check whether the signals are output.

  • If so, go to step 7.
  • If not, go to step 10.

7. Run the clock bits output-threshold command on the peer end to restore the default threshold or decrease the threshold.

8. Run the clock bits-type command to configure the signal type as 2mbps or 2mhz on both ends. - If the alarm still exists, go to step 9.

9. Configure the clock again. For details, see 1588v2 Configuration in Configuration Guide - System Management. - If the alarm still exists, go to step 11.

10. Collect the alarm, log, and configuration information, and contact Huawei technical support personnel.

11. End.

Copyright © Huawei Technologies Co., Ltd.
Copyright © Huawei Technologies Co., Ltd.
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