DEVM/1/hwBoardInvalid_clear

Message

DEVM/1/hwBoardInvalid_clear: The board resumed from total failure. (EntityPhysicalIndex=[EntityPhysicalIndex], EntPhysicalIndex=[EntPhysicalIndex], EntPhysicalName=[EntPhysicalName], EntityType=[EntityType], EntityTrapFaultID=[EntityTrapFaultID], Reason=[Reason])

In VS mode, this log is supported only by the admin VS.

Parameters

Parameter Name	Parameter Meaning
EntityPhysicalIndex	Indicates the index of the physical entity.
EntPhysicalIndex	Indicates the index of the physical entity.
EntPhysicalName	Indicates the name of the entity such as a chassis.
EntityType	Indicates the type of the physical entity. The value can be one of the following: 1: mpu(1) 2: lpu(2) 3: sfu(3) 4: pic(4) 5: cfcard(5) 6: ofc(6) 7: npu(7)
EntityTrapFaultID	Indicates the error code.
Reason	Indicates the description of the cause of the trap.

Possible Causes

Cause 1:The link between the TM chip and the NP chip was detected normal.
Cause 3:The number of links between the TM chip and the SFU was normal.
Cause 4:The board succeed the self check.
Cause 17:SFU Fabric chip recovered.
Cause 20:FABRIC SRD CRC check succeed.
Cause 29:The SD5000 self-check recovered.
Cause 32:The EEPROM of the board recovered.
Cause 63:The board power supply failed.
Cause 69:The crosspoint of the board recovered.
Cause 131843:
The board info of the mpu conflicted.

The conflicted that the power supply for the board was insufficient was rectified.
Cause 131844:The MPU system master recovered.
Cause 132609:The board recovered from the abnormal resetting caused by the heartbeats loss.
Cause 132610:The board and device types were matched.
Cause 132612:The board recovered from a clock synchronization failure.
Cause 132613:The board recovered from an FPGA logic failure.
Cause 132614:The board recovered from an EPLD logic failure.
Cause 132616:The clock signal of the board recovered.
Cause 132617:The TM chip on the board recovered.
Cause 132618:The NP of the board recovered.
Cause 132619:The fault, that the signals obtained from the master and slave MPUs by the board were incorrect, was rectified.
Cause 132620:The fault that the power supply for the board was insufficient was rectified.
Cause 132621:The control bus of the board recovered.
Cause 132623:NSE on the board recovered.
Cause 132624:The memory of the board recovered.
Cause 132625:The Lanswitch chip of the board recovered.
Cause 132626:The fault that the board was powered off was rectified.
Cause 132627:The fault that the board registration failed was rectified.
Cause 132628:The board recovered from abnormal resetting.
Cause 132629:The PHY chip of the board recovered.
Cause 132630:The clock signals of the SFU fabric recovered.
Cause 132632:The control bus recovered.
Cause 132654:The board type is compatible with the software version.
Cause 132657:The FE bandwidth was sufficient after some subcards connected to the FE were removed.
Cause 132660:The board temperature was normal.
Cause 132661:Alarm was cleared from command reseting board.
Cause 132670:The board recovered from a complete failure.
Cause 132671:The overall functions of a board were restored.
Cause 132672:The overall functions of the board were restored.
Cause 132673:The overall functions of the board were restored.
Cause 132676:Improve the fan power success.
Cause 132679:The ETM chip on the board recovered.
Cause 132680:The TM chip fatal interrupt on the board recovered.
Cause 132685:The board was properly inserted.
Cause 132686:The board was properly inserted.
Cause 132687:The board was properly inserted.
Cause 132690:The board recovered from an FPGA1 logic failure.
Cause 132691:The board recovered from an FPGA2 logic failure.
Cause 132692:The board recovered from an FPGA3 logic failure.
Cause 132693:The board recovered from an FPGA4 logic failure.
Cause 132694:The board recovered from an FPGA5 logic failure.

Procedure

This trap message is informational only, and no action is required.