Overview of Clock Synchronization
Definition
Synchronization is classified into the following types:
Clock synchronization, also called frequency synchronization
Clock synchronization maintains a strict relationship between signal frequencies or between signal phases. Signals are transmitted at the same average rate within the valid time. In this manner, all devices on a network run at the same rate.
On a digital communication network, a sender places a pulse signal in a specific timeslot for transmission. A receiver needs to extract this pulse signal from this specific timeslot to ensure that the sender and receiver communicate properly. The clocks on the sender and receiver must also be synchronized to ensure smooth communication. Clock synchronization enables the clocks on the sender and receiver to be synchronized.
Time synchronization, also called phase synchronization
Generally, the word "time" indicates either a moment or a time interval. A moment is a transient in a period, whereas a time interval is the interval between two transients. Time synchronization adjusts the internal clocks and moments of devices based on a received time. The working principle of time synchronization is similar to that of clock synchronization. When a time is adjusted, both the frequency and phase of a clock are adjusted. The phase of this clock is represented by a moment in the form of year, month, day, hour, minute, second, millisecond, microsecond, and nanosecond. Time synchronization enables devices to receive discontinuous time reference information and to adjust their times to synchronize times. Clock synchronization enables devices to trace a clock source to synchronize frequencies.
The figure shows the difference between time synchronization and clock synchronization. In time synchronization, watches A and B always keep the same time. In clock synchronization, watches A and B keep different times, but the time difference between the two watches is a constant value, for example, 6 hours.
Purpose
Clock synchronization aims to limit the clock frequency or phase difference between network elements (NEs) on a digital communication network within an allowable range. Information is coded into digital pulse signals using pulse code modulation (PCM) and transmitted on a digital communication network. If the clock frequencies of two digital switching devices are different, or digital bit streams are corrupted due to interference during transmission, phase drift or jitter occurs. Consequently, the buffer of the digital switching system experiences data loss or duplication, resulting in incorrect transmission of bit streams. If the clock frequency or phase difference exceeds an allowable range, bit errors or jitter may occur. As a result, network transmission performance deteriorates.