CLKM/2/hwClockSourceInputBelowThreshold_active: The SSM of input below threshold notification. (hwClockAttributeChassisIndex=[hwClockAttributeChassisIndex], hwClockSrcCfgChassisIndex=[hwClockSrcCfgChassisIndex], hwClockSrcCfgSourceTypeIndex=[hwClockSrcCfgSourceTypeIndex], hwClockSrcCfgSourceIndex=[hwClockSrcCfgSourceIndex], hwClockChassisId=[hwClockChassisId], hwClockPllId=[hwClockPllId], hwClockAttributeInputThreshold=[hwClockAttributeInputThreshold], hwClockSrcCfgSourceSsm=[hwClockSrcCfgSourceSsm])
In VS mode, this log is supported only by the admin VS.
| Parameter Name | Parameter Meaning |
|---|---|
|
hwClockAttributeChassisIndex |
Indicates the index of the chassis where the non-PTP clock source is located. In the case of a single chassis, the index is 1. For a chassis where a PTP clock source is located, the index is invalid. |
|
hwClockSrcCfgChassisIndex |
Chassis index of the clock source. |
|
hwClockSrcCfgSourceTypeIndex |
Index of the clock source type. values: bits(1). ptp(2). interface(3). cesacr(4). |
|
hwClockSrcCfgSourceIndex |
Index of the clock source. |
|
hwClockChassisId |
Chassis index of the clock source. |
|
hwClockPllId |
Id of the clock source type. values: System(1), system PLL. sync2M-1(2), 2M PLL-1. sync2M-2(3), 2M PLL-2. |
|
hwClockAttributeInputThreshold |
Threshold of the external clock source input. values: prc(2). ssua(4). ssub(8). sec(11). dnu(15). prtc(8194). eprtc(8450). esec(8715). eprc(8962). |
|
hwClockSrcCfgSourceSsm |
SSM of the clock source. values: unk(0). prc(2). ssua(4). ssub(8). sec(11). dnu(15). unknown(16). prtc(8194). eprtc(8450). esec(8715). eprc(8962). |
When the SSM control function is enabled, the input SSM level of the clock source is lower than the threshold.
1. Run the display clock config command to view the input threshold of the clock source.
2. Run the display clock source command to view the input SSM level of the clock source.
3. Collect alarm, log, and configuration information, and contact Huawei technical support personnel.
4. End.