(Optional) Configuring Parameters for Automatic Clock Source Selection

Procedure

1. Run system-view

   The system view is displayed.

2. Run clock freq-deviation-detect enable

   Frequency deviation detection is enabled.

   When frequency deviation detection is enabled, frequency deviation detection results serve as reference factors for automatic clock source selection and may affect the final clock source selection.

3. Run clock board-freq-switch enable

   Frequency deviation-triggered clock source switching is enabled.

   After this function is enabled, if the system detects that the frequency deviation of the clock source is abnormal, it notifies the interface board where the clock source resides, triggering the interface board to select the optimal clock source for use.

4. Run clock freq-deviation recover

   Frequency deviation status recovery is enabled for clock sources.

   A clock source can participate in reference clock source selection only when its frequency deviation status is normal.

   

   In scenarios where frequency deviation detection and frequency deviation-triggered clock source switching are both enabled, if the frequency deviation of a clock source is detected to be abnormal, then the clock source frequency deviation status is set to be abnormal. When selecting the reference clock source, the interface board excludes this clock source from the candidate clock source list. After determining that the frequency deviation of the clock source has recovered, you can run this command to recover its frequency deviation status, so that the clock source can participate in reference clock source selection again.

5. Run clock map unk { dnu | prc | sec | ssua | ssub | prtc | eprtc | esec | eprc }

   An SSM level is mapped to the clock source with an SSM level of unk.

   unk indicates that the clock source has an unknown SSM level. The clock source with an SSM level of unk cannot participate in clock source selection. To enable this type of clock source to participate in clock source selection, map a valid SSM level to it.

6. Run clock max-out-ssm { prc | sec | ssua | ssub | prtc | eprtc | esec | eprc }

   The maximum output SSM level is configured for clock signals.

   By default, the SSM level that the NetEngine 8000 F transfers to a downstream device is the actual SSM level of clock signals. To reduce the probability that a downstream device traces clock signals with poor quality, configure a lower maximum output SSM level to limit the SSM level that the NetEngine 8000 F transfers to this downstream device.

7. Run clock switch { revertive | non-revertive }

   A reversion mode is configured for the clock source selection algorithm.

   The NetEngine 8000 F supports the following reversion modes:

   • Revertive mode: If the optimal clock source is faulty, the NetEngine 8000 F uses the clock source selection algorithm to select the second optimal clock source. If the optimal clock source is restored, the NetEngine 8000 F automatically retraces it.
   • Non-revertive mode: If the optimal clock source is faulty, the NetEngine 8000 F uses the clock source selection algorithm to select the second optimal clock source. If the optimal clock source is restored, the NetEngine 8000 F continues to trace the second optimal clock source. If there is no the second optimal clock source to select, the NetEngine 8000 F select the optimal clock source.

8. Run clock source-lost holdoff-time holdoff-time-value

   A holdoff time after clock source signals are lost is configured.

   When clock source signals are lost, the NetEngine 8000 F reports status changes only after a holdoff time to instruct the clock source selection algorithm to reselect a clock source. This processing mechanism prevents the clock source selection algorithm from frequently reselecting a clock source when clock source signals are lost for a short time.

9. Run clock wtr wtr-time

   A WTR time is configured for a status change after the clock source is restored.

   You can configure an appropriate WTR time to minimize the impact of frequent clock source status changes on clock source selection.

10. Run commit

    The configuration is committed.