Basic Concepts

Clock Source

A device that provides clock signals for another device is called a clock source. A device may have multiple clock sources. The clock sources are classified as follows:

• External clock source

  An external clock source traces a high-level clock through the clock interface provided by a clock board. For example, the clock source of Building Integrated Timing Supply System (BITS) can be connected to the device through the CLK port to provide reference time signals.

• Line clock source

  A clock board uses Ethernet interfaces to extract clock signals from Ethernet line signals or STM-N line signals.

• Internal clock source

  The reference clock provided by the local device, for example, the clock provided by a clock board, is used as the working clock of an interface.

Reference Factors for Clock Source Selection

The NetEngine 8000 F can select a clock source based on three reference factors: priorities, synchronous status message (SSM) levels, and IDs of clock sources.

Clock Source Selection Modes

The NetEngine 8000 F supports the following clock source selection modes:

• Automatic clock source selection: The NetEngine 8000 F uses the automatic clock source selection algorithm to determine a clock source to be traced based on priorities, SSM levels, and clock IDs of clock sources.

• Manual clock source selection: A clock source to be traced is manually specified. This clock source must have the highest SSM level.
• Forcible clock source selection: A clock source to be traced is forcibly specified. This clock source can be any clock source.

You are advised to configure the automatic clock source selection mode. In this mode, the NetEngine 8000 F dynamically selects an optimal clock source based on clock source quality.

If the manually specified clock source becomes invalid, the NetEngine 8000 F automatically switches to track the clock source selected by the automatic clock source selection mode. After the manually specified clock source recovers, the NetEngine 8000 F does not switch back to track it. If the forcibly specified clock source becomes invalid, the system clock works in hold mode. If the conditions are not met, the system clock enters the FreeRun state.

Forcible Participation of SSM Levels in Clock Source Selection

In automatic clock source selection mode, you can configure SSM levels to forcibly participate in clock source selection. After the configuration is complete, the device determines a clock source to be traced based on priorities and SSM levels of clock sources. The device determines the SSM level of each clock source and preferentially selects a clock source with the highest SSM level. If two or more clock sources have the same SSM level, the device selects a clock source based on the priorities of these clock sources.

SSM

The International Telecommunication Union-Telecommunication Standardization Sector (ITU-T) defined an SSM to identify the quality level of a synchronization source on synchronous digital hierarchy (SDH) networks. As stipulated by the ITU-T, the four spare bits in one of the five Sa bytes in a 2 Mbit/s bit stream are used to transmit the SSM value. The use of the SSM value in clock source selection improves synchronization network performance, prevents timing loops, achieves synchronization on networks with different structures, and enhances synchronization network reliability.

Extended SSM

The extended SSM function enables clock IDs to participate in automatic clock source selection. This function prevents clock loops.

When the extended SSM function is enabled, the device does not allow clock IDs to participate in automatic clock source selection in either of the following cases:

• The clock ID of a clock source is the same as the clock ID configured on the device.
• The clock ID of a clock source is 0.

Ehanced SSM

The enhanced SSM function adds four SSM levels to the original SSM levels. After enhanced SSM is enabled, the system uses the enhanced SSM level as the information for clock source selection and collects statistics on the number of high-precision devices and the number of common-precision devices on clock transmission links.

The four new SSM levels in ascending order are as follows:

1. ESEC: Indicates that the SSM level is G.8262.1 clock signal.
2. EPRC: Indicates that the SSM level is G.811.1 clock signal.
3. PRTC: Indicates that the SSM level is G.8272 clock signal.
4. EPRTC: Indicates that the SSM level is G.8272.1 clock signal.