Bit error detection
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A device uses the CRC algorithm to detect bit errors on an inbound interface. Bit error detection types are classified as trigger-LSP, trigger-section, or link-quality.
The device uses BFD packets or MPLS-TP OAM to advertise the bit error status, and promptly notifies the peer device of bit error generation and clearing events.
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This feature is the basis of other bit-error-triggered protection switching features.
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To prevent line jitters from frequently triggering service switchovers and switchbacks, set the bit error alarm clear threshold to be one order of magnitude lower than the bit error alarm threshold.
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Bit-error-triggered section switching
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If bit errors are generated or cleared on an interface, the link layer protocol status of the interface changes to bit-error-detection Down or Up, triggering an upper-layer application associated with the interface for a service switchover or switchback.
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Trigger-section bit error detection must be enabled on an interface.
The bit error status must be advertised using BFD packets.
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This feature is independently deployed.
When deploying trunk-bit-error-triggered section switching, you can enable bit-error-triggered section switching on trunk member interfaces.
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Enable bit-error-triggered section switching on the interfaces at both ends of a link.
If bit errors occur on both the primary and secondary links, bit-error-triggered section switching may interrupt services. Therefore, bit-error-triggered IGP route switching is recommended.
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Bit-error-triggered IGP route switching
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If bit errors are generated or cleared on an interface, the link quality level of the interface changes to Low or Good, triggering an IGP (OSPF or IS-IS) to increase the cost of the interface's link or restore the original cost for the link. IGP routes on the peer device then do not preferentially select the link with bit errors or preferentially select the link again.
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Link-quality bit error detection must be enabled on an interface.
The bit error status must be advertised using BFD packets.
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This feature is independently deployed.
When deploying trunk-bit-error-triggered IGP route switching, you must deploy bit-error-triggered IGP route switching on trunk interfaces.
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Bit-error-triggered trunk update
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If bit errors are generated or cleared on a trunk member interface, the trunk interface is triggered to delete or re-add the member interface from or to the forwarding plane. If bit errors occur on all trunk member interfaces or the number of member interfaces without bit errors is lower than the lower threshold for the trunk interface's Up links, bit-error-triggered protection switching involves the following modes:
Trunk-bit-error-triggered section switching: The trunk interface goes Down, triggering an upper-layer application associated with the trunk interface to perform a service switchover.
Trunk-bit-error-triggered IGP route switching: The trunk interface ignores the bit errors on the member interfaces and remains Up. However, the link quality level of the trunk interface becomes Low, triggering an IGP to increase the cost of the trunk interface's link. IGP routes then do not preferentially select the link.
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When deploying trunk-bit-error-triggered section switching, you must enable trigger-section or trigger-LSP bit error detection on trunk member interfaces.
When deploying trunk-bit-error-triggered IGP route switching, you must enable link-quality bit error detection on trunk member interfaces.
The bit error status must be advertised using BFD packets.
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Trunk-bit-error-triggered section switching is independently deployed.
When deploying trunk-bit-error-triggered IGP route switching, you must deploy bit-error-triggered IGP route switching on trunk interfaces.
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Enable the same bit-error-triggered protection switching function on the trunk interfaces at both ends.
Trunk-bit-error-triggered IGP route switching is recommended.
Layer 2 trunk interfaces do not support an IGP. Therefore, bit-error-triggered IGP route switching cannot be deployed on Layer 2 trunk interfaces.
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Bit-error-triggered RSVP-TE tunnel switching
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The ingress of the primary and backup CR-LSPs determines the bit error statuses of the CR-LSPs based on link BERs. A service switchover or switchback is then performed based on the bit error statuses of the CR-LSPs.
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Trigger-LSP bit error detection must be enabled on an interface.
The bit error status must be advertised using BFD packets.
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This feature is independently deployed.
This feature is deployed together with bit-error-triggered PW switching.
This feature is deployed together with bit-error-triggered L3VPN switching.
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To implement dual-ended switching, deploy bit-error-triggered protection switching on the RSVP-TE tunnels in both directions and configure the tunnels as bidirectional associated CR-LSPs.
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Bit-error-triggered PW switching
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If bit errors occur, service traffic is switched from the primary PW to the secondary PW.
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Trigger-LSP bit error detection must be enabled on an interface.
The bit error status must be advertised using BFD packets.
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This feature is deployed together with bit-error-triggered RSVP-TE tunnel switching.
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If an RSVP-TE tunnel with bit-error-triggered protection switching enabled is used to carry a PW, bit-error-triggered RSVP-TE tunnel switching is preferentially performed. Bit-error-triggered PW switching is performed only when bit-error-triggered RSVP-TE tunnel switching fails to protect services against bit errors.
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Bit-error-triggered L3VPN route switching
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If bit errors occur, VPN routes are triggered to reconverge. Service traffic is then switched to the link without bit errors.
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Trigger-LSP bit error detection must be enabled on an interface.
The bit error status must be advertised using BFD packets.
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This feature is deployed together with bit-error-triggered RSVP-TE tunnel switching.
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If an RSVP-TE tunnel with bit-error-triggered protection switching enabled is used to carry an L3VPN, bit-error-triggered RSVP-TE tunnel switching is preferentially performed. Bit-error-triggered L3VPN route switching is performed only when bit-error-triggered RSVP-TE tunnel switching fails to protect services against bit errors.
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Bit-error-triggered static CR-LSP/PW/E-PW APS
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Static CR-LSPs/PWs/E-PWs are used to carry user services, and MPLS-TP OAM is deployed to ensure reliability. If a node detects bit errors, the node uses MPLS-TP OAM to advertise the bit error status to the egress. APS is then used to trigger a traffic switchover.
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The MAC-layer SD alarm function (Trigger-LSP type) must be enabled on interfaces.
The bit error status must be advertised using MPLS-TP OAM.
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This feature is independently deployed.
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If a tunnel protection group has been deployed for static CR-LSPs carrying PWs/E-PWs, bit errors preferentially trigger static CR-LSP protection switching. Bit-error-triggered PW protection switching is performed only when bit-error-triggered static CR-LSP protection switching fails to protect services against bit errors.
Eth-Trunk interfaces do not support the advertisement of the bit error status by MPLS-TP OAM.
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